A design scheme of charge pump circuit for white LED driving

0 Preface

At present, booster circuits used for white light drive mainly include inductive DC-DC circuits and charge pump circuits. The inductive DC-DC circuit has problems such as EMI, and the charge pump circuit has a simple structure and small EMI, and is widely used.

There are two main types of charge pumps driven by white LEDs: voltage mode and current mode. Relative to the voltage mode may cause the disadvantage of each LED brightness mismatch, the current mode outputs a constant current for each channel separately, so that the brightness can be better matched, and does not require external balancing resistors, which greatly saves space.

The design scheme of the current-type charge pump circuit for white LED driving proposed in this paper. The design scheme uses 1.5 times voltage boost, which improves efficiency compared with the traditional 2 times voltage boost mode, and uses digital dimming to provide 32-level grayscale output to meet the requirements of different occasions. The system structure is shown in Figure 1. It can be divided into the following parts: bandgap reference circuit, soft start circuit, oscillator, 1.5 times charge pump, digital dimming module. When the EN / SET terminal inputs a high level, the chip starts, and Vin is boosted by a 1.5-fold charge pump to stabilize the output voltage at 5 V. If a series of pulses are input to the EN / SET terminal and then set to a high level, the digital dimming The module can record the number of pulses, and then convert to different output currents to achieve dimming function.

1 1.5 Principle of voltage double charge pump

1.1 Basic principles

The principle of the 1.5 times charge pump is shown in Figure 2. The basic control idea is as follows: OSC controls the turn-on and turn-off of S1 ~ S7 through the drive circuit. The sequence is as follows: at the first moment, turn on S1, S4, S6, Vin charges capacitor C1, C2 is shorted, so that VC1 = V1, VC2 = 0; at the second moment, turn off S1, S4, S6, turn on S2, S3, S5 , S7, C1 charges C2, so that VC1 = VC2 = 1/2 V1, and finally add V1 to charge C3, and iteratively, VCUT is divided by the resistance, compared with the reference voltage, control the on-resistance of the upper MOS tube, change The RC charging constant of the charging circuit finally stabilizes the output at 5 V. Figure 3 is the control pulse timing diagram, in which D1 is the drive signal of S1, low effective; D2 is the drive signal of S4, S6, high effective; D3 is S2, The drive signals of S3, S5, and S7 are active low. In order to prevent clock feedthrough, a non-overlapping clock circuit is included in the drive circuit.

1.2 Actual circuit design

The entire switch network consists of 5 PMOS tubes S1, S2, S3, S5, S7 and 2 NMOS tubes S4, S6, as shown in Figure 4. Take P tube S1 and N tube S4 as examples to calculate the width-to-length ratio of the switch tube. According to the requirements of layout design rules, the width-to-length ratio W / L of a single tube can be set to 2.8μm / 0.6μm. Suppose the width-to-length ratio of S1 is x (W / L) and the width-to-length ratio of S4 is y (W / L). This design uses CSMC0.6 μm process, according to the process and design requirements, V1 = 3.3 V, unCOX = 50μA / V2 VTHN = 0.7 V, | VTHP | = 1 V, 2up = un, because

The width-to-length ratio of other tubes can also be obtained in the same way. Because the current flowing through the switch tube is relatively large, and the width-to-length ratio of the switch tube is large, it is generally in the form of transistor parallel connection, which is usually implemented in a waffle structure on the layout.

If the substrate of the switch tube is not connected to the source terminal, a substrate bias effect will occur, causing the threshold loss of the switch tube, resulting in the charge pump voltage not being able to rise to the set value. As shown in Figure 4, the source and drain terminals of the switch tubes S1, S3, S4, S5, and S6 can be easily determined, and the voltage levels at both ends of S2 and S7 are undecided, so if they are not handled properly, it will cause substrate bias. Effect, this design uses a way to solve this problem relatively well. Compare V1 and Vout through a comparator. If Vout> V1, let the substrates of S2 and S7 be connected to Vout. If Vout

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